The point of the configuration access capability is to enable access to other capabilities. The intent never was to allow writes to a random place within device BARs. Limiting drivers simplifies devices - and devices can always add another capability if drivers ever want to access some other range. Cc: Gerd Hoffmann <
kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <
mst@redhat.com> --- content.tex 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/content.tex b/content.tex index d989d98..db5e2c8 100644 --- a/content.tex +++ b/content.tex @@ -1132,6 +1132,7 @@ The virtio device configuration layout includes several structures: item Notifications item ISR Status item Device-specific configuration (optional) +item PCI configuration access end{itemize} Each structure can be mapped by a Base Address register (BAR) belonging to @@ -1578,6 +1579,12 @@ at BAR selected by field{cap.bar} and store the first field{cap.length} bytes The driver MUST NOT write a field{cap.offset} which is not a multiple of field{cap.length} (ie. all accesses MUST be aligned). +The driver MUST NOT read or write field{pci_cfg_data} +unless field{cap.bar}, field{cap.length} and field{cap.offset} +address field{cap.length} bytes within a BAR range +specified by some other Virtio Structure PCI Capability +of type other than field{VIRTIO_PCI_CAP_PCI_CFG}. + subsubsection{Legacy Interfaces: A Note on PCI Device Layout}label{sec:Virtio Transport Options / Virtio Over PCI Bus / PCI Device Layout / Legacy Interfaces: A Note on PCI Device Layout} Transitional devices MUST present part of configuration -- MST